Simulate the operation of your instructions and architecture.Define variables that represent the state of the CPU: a PC (program counter), registers (if your custom instruction set supports them), CPU status bits (if your custom instruction set and architecture uses them - likely it would), stack pointer (if your instruction set and architecture has a stack), etc.
#Xdesign backback instruction to assembly software#
Assuming you are thinking of a custom instruction set that operates in the context of a standard von Neumann architecture that runs in a linear array of memory with a program counter, then your emulate would be a piece of software that pretends to be the CPU. But in either case, the answer is still "yes".Įrik's very informative answer has offered verious perspectives on this question. By "instruction set" I assume you mean commands that are similar in function and scope to existing CPU instruction sets (as opposed to something more extremely different or exotic). (This leads to the answer to your last question, which I'll get to.) If you have a different definition of "custom," then you should share it. A custom instruction set probably really implies a custom CPU architecture. By "custom," to me that implies it's an instruction set not implemented on a known piece of hardware. Yes, of course! You can make anything you like! (Seriously) :) I assume that you have specific definitions in mind for "custom" and "instruction set". Is it feasible to make Custom Instruction Sets?
#Xdesign backback instruction to assembly code#
Sometimes the translation is done more or less dynamically as well, which is probably necessary if the custom processor allows for writing to code memory and later executing that new code. Machine code programs may also load (indirectly) from code memory, so the original machine code program may also be kept in the translation. The actual translation requires a mapping of the stateful features of the custom instruction set into stateful features of the existing instruction set, along with mapping of machine code operations over those stateful resources.īecause machine code programs can do indirect branches, whose operations are difficult to predict statically, a translating solution may include mapping tables to find where to go in the translation given the simulated program counter. from a custom instruction set to an existing instruction set. We can translate machine code of one form into machine code of another form, i.e. only word addressable whether big endian or little endian, etc. You would make adjustments for the custom processor, such as whether the processor is byte addressable vs. An interpreter loop for that processor would look something like this: uint16_t memory
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